| US 7,592,987 B2 | ||
| Current-scaling active thin film transistor circuit structure for pixel of display device | ||
| Pei-Ming Chen, Tao Yuan Shien (Taiwan); Yen-Lin Wei, Tao Yuan Shien (Taiwan); An-Chih Wang, Tao Yuan Shien (Taiwan); Yen-Chung Lin, Hsinchu (Taiwan); Jian-Zhi Huang, Hsinchu (Taiwan); Chia-Feng Yang, Hsinchu (Taiwan); Jiun-Shiau Wang, Hsinchu (Taiwan); and Han-Ping Shieh, Hsinchu (Taiwan) | ||
| Assigned to Quanta Display, Inc., Tao Yuan, Shien (Taiwan); and National Chiao Tung University, Hsinchu (Taiwan) | ||
| Filed on Mar. 02, 2006, as Appl. No. 11/365,515. | ||
| Claims priority of application No. 94131193 A (TW), filed on Sep. 09, 2005. | ||
| Prior Publication US 2007/0057294 A1, Mar. 15, 2007 | ||
| Int. Cl. G09G 3/32 (2006.01) | ||
| U.S. Cl. 345—82 | 20 Claims |
| 1. A current-scaling active thin film transistor circuit structure for a pixel of a display device, comprising:
a data line for providing a data current;
a scanning line;
a direct-current voltage source;
a first storage capacitor;
a second storage capacitor electrically connected to the first storage capacitor in series; and
a plurality of transistors, comprising a first transistor, a second transistor, a third transistor, and a fourth transistor;
wherein one terminal of the third transistor is electrically connected to the direct-current voltage source, the gate of the
third transistor is electrically connected to one terminal of the second storage capacitor and the scanning line, one terminal
of the fourth transistor is electrically connected to a light-emitting unit, the gate of the first transistor is electrically
connected to the gate of the second transistor, and the gate of the first transistor and that of the second transistor are
electrically connected to the scanning line.
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