| US 7,592,708 B2 | ||
| Package board, semiconductor package, and fabricating method thereof | ||
| Seung-Gu Kim, Chungcheonbuk-do (Korea, Republic of); Je-Gwang Yoo, Yongin-si (Korea, Republic of); Yong-Bin Lee, Cheongju-si (Korea, Republic of); Yoo-Keum Wee, Goyang-si (Korea, Republic of); Seok-Hwan Huh, Seoul (Korea, Republic of); and Chang-Sup Ryu, Yongin-si (Korea, Republic of) | ||
| Assigned to Samsung Electro-Mechanics Co., Ltd., Suwon (Korea, Republic of) | ||
| Filed on Sep. 28, 2006, as Appl. No. 11/528,324. | ||
| Claims priority of application No. 10-2005-0094546 (KR), filed on Oct. 07, 2005. | ||
| Prior Publication US 2007/0080469 A1, Apr. 12, 2007 | ||
| Int. Cl. H01L 21/31 (2006.01); H01L 21/469 (2006.01) | ||
| U.S. Cl. 257—783 [257/787; 438/118] | 22 Claims |
| 1. A semiconductor package comprising:
a board having circuit lines;
solder resist formed on a surface of the board; and
a chip mounted on the board and having at least one bump attached to at least a portion of the circuit lines,
wherein the solder resist comprises a perimeter groove and an extension groove, the perimeter groove exposing at least a portion
of the circuit lines, and the extension groove connected to the perimeter groove,
and wherein encapsulant is filled in the perimeter groove and the extension groove.
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