| US 7,592,694 B2 | ||
| Chip package and method of manufacturing the same | ||
| Yu-Tang Pan, Tainan County (Taiwan); Men-Shew Liu, Tainan County (Taiwan); and Shih-Wen Chou, Tainan County (Taiwan) | ||
| Assigned to ChipMOS Technologies Inc., Hsinchu (Taiwan) | ||
| Filed on May 09, 2007, as Appl. No. 11/746,064. | ||
| Claims priority of application No. 95147426 A (TW), filed on Dec. 18, 2006. | ||
| Prior Publication US 2008/0142947 A1, Jun. 19, 2008 | ||
| Int. Cl. H01L 23/495 (2006.01) | ||
| U.S. Cl. 257—692 [257/666; 257/690; 257/E23.01; 438/112; 438/126] | 19 Claims |
| 1. A chip package, comprising:
a metal layer;
a film-like circuit layer, disposed on the metal layer, comprising:
an insulating film, disposed on the metal layer; and
a circuit layer, disposed on the insulating film, wherein the circuit layer has a plurality of conductive traces;
a chip, disposed above the metal layer, wherein the chip is electrically connected to the conductive traces;
a lead matrix, disposed outside the chip, having a plurality of leads, wherein at least part of the leads are electrically
connected to the conductive traces;
an insulating glue, disposed between the leads and the metal layer in direct contact, wherein the leads are partly overlying
the metal layer; and
an encapsulant, at least encapsulating the chip, the film-like circuit layer, at least part of the leads and at least part
of the metal layer.
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