US 7,592,263 B2
Method of manufacturing semiconductor device
Kazuo Gouda, Osaka (Japan); Koji Tsuji, Suita (Japan); Masao Kirihara, Kadoma (Japan); and Youichi Nishijima, Osaka (Japan)
Assigned to Panasonic Electric Works Co., Ltd., Osaka (Japan)
Appl. No. 10/598,372
PCT Filed Mar. 15, 2005, PCT No. PCT/JP2005/005039
§ 371(c)(1), (2), (4) Date Feb. 05, 2007,
PCT Pub. No. WO2005/087652, PCT Pub. Date Sep. 22, 2005.
Claims priority of application No. 2004-073218 (JP), filed on Mar. 15, 2004.
Prior Publication US 2008/0038921 A1, Feb. 14, 2008
Int. Cl. H01L 21/302 (2006.01)
U.S. Cl. 438—719  [438/620; 438/700] 6 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor device, by use of a perforating process including providing a mask having an opening on a semiconductor substrate, and forming plural types of through-holes different in width dimension in said semiconductor substrate, wherein a removal rate of a semiconductor material in the depth direction of said semiconductor substrate becomes higher as said opening has a wider opening width, said method comprising:
a first step of forming a concave portion in a first surface of a semiconductor substrate, in a first region of said semiconductor substrate corresponding to the opening of said mask having a relatively narrow opening width, to allow said first region to have a thickness dimension less than that of a second, remaining, region of said semiconductor substrate; and
a second step of performing said perforating process using said mask provided on a second, opposite, surface of said semiconductor substrate, to form a first through-hole reaching said first surface in said second region of said semiconductor substrate and a second through-hole reaching said concave portion.