CPC H10B 51/20 (2023.02) [H01L 29/41741 (2013.01); H01L 29/41775 (2013.01); H10B 51/10 (2023.02); H10B 51/30 (2023.02)] | 20 Claims |
1. A memory device, comprising:
a first memory array comprising:
a plurality of memory strings spaced from each other along a first lateral direction and a second lateral direction, each of the plurality of memory strings comprising a plurality of memory cells arranged along a vertical direction; and
a plurality of first conductive structures extending along the vertical direction;
wherein each of the plurality of first conductive structures comprises a first portion and a second portion;
wherein the first portion extends across the plurality of memory cells of a corresponding pair of the plurality of memory strings along the vertical direction, and the second portion is disposed over the first portion along the vertical direction; and
wherein the second portion extends farther than the first portion along at least one of the first or second lateral direction.
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