CPC H10B 43/27 (2023.02) [H01L 23/5283 (2013.01); H10B 43/10 (2023.02); H10B 43/35 (2023.02)] | 15 Claims |
1. A method for forming a three-dimensional (3D) memory device, comprising:
forming a cut structure in a stack structure, the stack structure comprising interleaved a plurality of initial sacrificial layers and a plurality of initial insulating layers;
removing portions of the stack structure adjacent to the cut structure to form a slit structure and an initial support structure, the initial support structure dividing the slit structure into a plurality of slit openings;
forming a plurality of conductor portions in the initial support structure through the plurality of slit openings;
forming a source contact in each of the plurality of slit openings;
removing portions of the initial support structure to form a support structure, the support structure comprising an adhesion portion extending through the support structure; and
forming an adhesion layer over the source contact in each of the plurality of slit openings, at least two adhesion layers being conductively connected to the adhesion portion extending through the support structure.
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