US 11,758,720 B2
Flash memory cell
Chia-Min Hung, Tainan (TW); Ping-Chia Shih, Tainan (TW); Che-Hao Kuo, Tainan (TW); Kuei-Ya Chuang, Chiayi County (TW); Ssu-Yin Liu, Kaohsiung (TW); Po-Hsien Chen, Tainan (TW); and Wan-Chun Liao, Hsinchu County (TW)
Assigned to UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed by UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed on Dec. 7, 2022, as Appl. No. 18/77,183.
Application 18/077,183 is a continuation of application No. 17/198,268, filed on Mar. 11, 2021, granted, now 11,552,088.
Prior Publication US 2023/0103976 A1, Apr. 6, 2023
Int. Cl. H10B 41/30 (2023.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 21/28 (2006.01); H01L 29/788 (2006.01)
CPC H10B 41/30 (2023.02) [H01L 29/40114 (2019.08); H01L 29/42328 (2013.01); H01L 29/66825 (2013.01); H01L 29/7881 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A flash memory cell, comprising:
a first floating gate having two sharp top corners and oblique sidewalls disposed on a substrate, wherein the two sharp top corners protrude upwardly from a top surface of the first floating gate, each of the two sharp top corners has a flat top surface, the oblique sidewalls of the first floating gate are inclined inwardly from bottom to top, and each of the oblique sidewalls of the first floating gate has a constant slope;
a first dielectric layer sandwiched by the first floating gate and the substrate; and
a first isolating layer and a first selective gate covering the first floating gate.