US 11,758,709 B2
Method for preparing semiconductor device with epitaxial structures
Tse-Yao Huang, Taipei (TW)
Assigned to NANYA TECHNOLOGY CORPORATION, New Taipei (TW)
Filed by NANYA TECHNOLOGY CORPORATION, New Taipei (TW)
Filed on Oct. 22, 2021, as Appl. No. 17/508,720.
Application 17/508,720 is a division of application No. 16/678,190, filed on Nov. 8, 2019.
Prior Publication US 2022/0052050 A1, Feb. 17, 2022
Int. Cl. H10B 12/00 (2023.01)
CPC H10B 12/31 (2023.02) [H10B 12/0335 (2023.02); H10B 12/482 (2023.02); H10B 12/488 (2023.02)] 4 Claims
OG exemplary drawing
 
1. A method for forming a semiconductor device, comprising:
forming a source region and a drain region in a semiconductor substrate;
forming a bit line over the source region;
growing a first epitaxial structure over the drain region, wherein a top surface of the first epitaxial structure is higher than a bottom surface of the bit line;
forming a capacitor contact over the first epitaxial structure;
forming a buffer layer covering the source region and the drain region;
partially removing the buffer layer and the source region to form a first opening; and
growing a second epitaxial structure in the first opening before the bit line is formed;
wherein the forming the bit line comprises:
forming a conductive layer over the second epitaxial structure;
forming a dielectric cap layer partially covering the conductive layer; and
etching the conductive layer and the second epitaxial structure using the dielectric cap layer as a mask such that the bit line is formed, wherein the second epitaxial structure is separated from the source region and the buffer layer by a gap after the bit line is formed.