US 11,757,025 B2
Gated metal-insulator-semiconductor (MIS) tunnel diode having negative transconductance
Jenn-Gwo Hwu, Taipei (TW); and Chien-Shun Liao, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW); and National Taiwan University, Taipei (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW); and National Taiwan University, Taipei (TW)
Filed on Dec. 3, 2020, as Appl. No. 17/111,427.
Application 17/111,427 is a continuation of application No. 16/142,890, filed on Sep. 26, 2018, granted, now 10,868,157.
Prior Publication US 2021/0119025 A1, Apr. 22, 2021
Int. Cl. H01L 29/739 (2006.01); H01L 29/51 (2006.01); H01L 29/45 (2006.01); H01L 29/49 (2006.01); H01L 29/06 (2006.01); H01L 21/28 (2006.01); H01L 29/66 (2006.01); H01L 29/423 (2006.01); H01L 21/265 (2006.01)
CPC H01L 29/7391 (2013.01) [H01L 21/28088 (2013.01); H01L 29/0649 (2013.01); H01L 29/0684 (2013.01); H01L 29/423 (2013.01); H01L 29/45 (2013.01); H01L 29/4966 (2013.01); H01L 29/517 (2013.01); H01L 29/66356 (2013.01); H01L 21/26513 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device, comprising:
a substrate;
a tunnel diode dielectric layer on the substrate;
a tunnel diode electrode on the tunnel diode dielectric layer;
a gate dielectric layer on the substrate adjacent to the tunnel diode dielectric layer;
a gate electrode on the gate dielectric layer; and
a substrate electrode on the substrate, the tunnel diode electrode positioned between the gate electrode and the substrate electrode,
wherein the tunnel diode electrode laterally surrounds a periphery of the gate electrode.