US 11,756,923 B2
High density and durable semiconductor device interconnect
Marian Sebastian Broll, Soest (DE); Barbara Eichinger, Villach (AT); Alexander Herbrandt, Soest (DE); and Alparslan Takkac, Meschede (DE)
Assigned to Infineon Technologies AG, Neubiberg (DE)
Filed by Infineon Technologies AG, Neubiberg (DE)
Filed on Sep. 1, 2021, as Appl. No. 17/464,113.
Prior Publication US 2023/0063259 A1, Mar. 2, 2023
Int. Cl. H01L 21/56 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01)
CPC H01L 24/84 (2013.01) [H01L 24/05 (2013.01); H01L 24/40 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/05684 (2013.01); H01L 2224/05766 (2013.01); H01L 2224/05787 (2013.01); H01L 2224/40245 (2013.01); H01L 2224/84214 (2013.01); H01L 2224/84238 (2013.01); H01L 2224/84379 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of forming a semiconductor assembly, the method comprising:
providing a carrier comprising a die attach pad;
providing a semiconductor die that comprises a bond pad disposed on a main surface of the semiconductor die; and
providing a metal interconnect element;
arranging the semiconductor die on the die attach pad such that the bond pad faces away from the die attach pad; and
welding the metal interconnect element to the bond pad by applying thermal energy to the bond pad;
wherein the bond pad comprises first and second metal layers,
wherein the second metal layer is disposed between the first metal layer and a semiconductor body of the semiconductor die,
wherein a thickness of the first metal layer is greater than a thickness of the second metal layer, and
wherein the first metal layer has a different metal composition as the second metal layer.
 
14. A semiconductor assembly, comprising:
a carrier comprising a die attach pad;
a semiconductor die that comprises a bond pad disposed on a main surface of the semiconductor die; and
a metal interconnect element;
wherein the bond pad comprises first and second metal layers,
wherein the second metal layer is disposed between the first metal layer and a semiconductor body of the semiconductor die,
wherein a thickness of the first metal layer is greater than a thickness of the second metal layer,
wherein the first metal layer has a different metal composition as the second metal layer, and
wherein the metal interconnect element is welded to the bond pad.