US 11,756,873 B2
Semiconductor package and manufacturing method thereof
Chia-Kuei Hsu, Hsinchu (TW); Ming-Chih Yew, Hsinchu (TW); Tsung-Yen Lee, Changhua County (TW); Po-Yao Lin, Hsinchu County (TW); and Shin-Puu Jeng, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Feb. 26, 2021, as Appl. No. 17/186,008.
Prior Publication US 2022/0278037 A1, Sep. 1, 2022
Int. Cl. H01L 23/498 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 25/18 (2023.01); H01L 25/00 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01)
CPC H01L 23/49838 (2013.01) [H01L 21/4857 (2013.01); H01L 21/561 (2013.01); H01L 21/563 (2013.01); H01L 23/49822 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 23/3185 (2013.01); H01L 23/3192 (2013.01); H01L 24/92 (2013.01); H01L 2224/92125 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor package comprising:
a semiconductor die;
a redistribution layer, disposed on an active surface of the semiconductor die and electrically connected with the semiconductor die, wherein the redistribution layer comprises a wiring-free zone arranged at a location below a corner of the semiconductor die, an orthogonal projection of the semiconductor die is partially overlapped with an orthogonal projection of the wiring-free zone on a horizontal plane, and a corner region of the wiring-free zone is overlapped with a corner region of the orthogonal projection of the semiconductor die; and
an underfill disposed between the semiconductor die and the redistribution layer,
wherein the wiring-free zone located below the underfill is in contact with the underfill, and the wiring-free zone extends horizontally from the semiconductor die, across a sidewall of the semiconductor die and to the underfill.