CPC H01L 23/49838 (2013.01) [H01L 21/4857 (2013.01); H01L 21/561 (2013.01); H01L 21/563 (2013.01); H01L 23/49822 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 23/3185 (2013.01); H01L 23/3192 (2013.01); H01L 24/92 (2013.01); H01L 2224/92125 (2013.01)] | 20 Claims |
1. A semiconductor package comprising:
a semiconductor die;
a redistribution layer, disposed on an active surface of the semiconductor die and electrically connected with the semiconductor die, wherein the redistribution layer comprises a wiring-free zone arranged at a location below a corner of the semiconductor die, an orthogonal projection of the semiconductor die is partially overlapped with an orthogonal projection of the wiring-free zone on a horizontal plane, and a corner region of the wiring-free zone is overlapped with a corner region of the orthogonal projection of the semiconductor die; and
an underfill disposed between the semiconductor die and the redistribution layer,
wherein the wiring-free zone located below the underfill is in contact with the underfill, and the wiring-free zone extends horizontally from the semiconductor die, across a sidewall of the semiconductor die and to the underfill.
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