US 11,755,221 B1
System for protecting CPU core by identifying data and instructions
Dale Weston Reese, Boise, ID (US); Matthew Ryan Waltz, Boise, ID (US); Jay Takeji Hirata, Meridian, ID (US); Andrew James Weiler, Nampa, ID (US); Nathan Charles Chrisman, Nampa, ID (US); and Claude Harmon Garrett, V, Meridian, ID (US)
Assigned to IDAHO SCIENTIFIC LLC, Boise, ID (US)
Filed by Idaho Scientific LLC, Boise, ID (US)
Filed on Oct. 13, 2022, as Appl. No. 17/965,659.
Application 17/965,659 is a continuation of application No. 17/889,010, filed on Aug. 16, 2022.
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/064 (2013.01) [G06F 3/062 (2013.01); G06F 3/0658 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of hardware enforced CPU core protection by identification of digital blocks as instructions or data, the method comprising:
at a memory controller shim, receiving, from a CPU core, a memory read request, wherein the memory read request comprises an address for a block;
requesting the block at the address from a memory;
receiving the block from the memory;
accessing at least one of a decryption key or an authentication key;
performing at least one of a decryption transformation or an authentication transformation on the block using the decryption key or the authentication key;
when the decryption transformation or authentication transformation is deemed valid, then returning a plain text version of the block, to the CPU core for consumption; and
when the decryption transformation or authentication transformation is deemed invalid, then preventing the CPU core from consuming the plain text version of the block.