US 11,754,873 B2
Display panel, data processor, and method for manufacturing display panel
Shunpei Yamazaki, Tokyo (JP); Koji Kusunoki, Kanagawa (JP); and Yoshiharu Hirakata, Kanagawa (JP)
Assigned to Semiconductor Energy Laboratory Co., Ltd., Atsugi (JP)
Filed by Semiconductor Energy Laboratory Co., Ltd., Atsugi (JP)
Filed on Feb. 22, 2021, as Appl. No. 17/180,950.
Application 15/290,073 is a division of application No. 15/092,221, filed on Apr. 6, 2016, abandoned.
Application 17/180,950 is a continuation of application No. 16/693,498, filed on Nov. 25, 2019, granted, now 11,016,329.
Application 16/693,498 is a continuation of application No. 15/290,073, filed on Oct. 11, 2016, granted, now 10,831,291, issued on Nov. 10, 2020.
Claims priority of application No. 2015-081519 (JP), filed on Apr. 13, 2015; application No. 2015-115638 (JP), filed on Jun. 8, 2015; and application No. 2015-150202 (JP), filed on Jul. 30, 2015.
Prior Publication US 2021/0173254 A1, Jun. 10, 2021
Int. Cl. G06F 3/0354 (2013.01); G02F 1/1335 (2006.01); G02F 1/1343 (2006.01); G02F 1/1345 (2006.01); G02F 1/1362 (2006.01); G06F 3/041 (2006.01); H10K 59/50 (2023.01); H10K 59/128 (2023.01); G02F 1/1333 (2006.01); G02F 1/1334 (2006.01); G02F 1/1368 (2006.01); G09G 3/20 (2006.01); G02F 1/1339 (2006.01); G09G 3/3233 (2016.01); G09G 3/36 (2006.01); G02F 1/167 (2019.01); H10K 59/12 (2023.01); G02F 1/1337 (2006.01)
CPC G02F 1/133514 (2013.01) [G02F 1/1334 (2013.01); G02F 1/1362 (2013.01); G02F 1/1368 (2013.01); G02F 1/13338 (2013.01); G02F 1/13452 (2013.01); G02F 1/13624 (2013.01); G02F 1/133305 (2013.01); G02F 1/133345 (2013.01); G02F 1/133553 (2013.01); G02F 1/133555 (2013.01); G02F 1/134309 (2013.01); G02F 1/134336 (2013.01); G02F 1/136227 (2013.01); G02F 1/136286 (2013.01); G06F 3/03547 (2013.01); G06F 3/0416 (2013.01); G06F 3/04164 (2019.05); G09G 3/2003 (2013.01); G09G 3/2007 (2013.01); H10K 59/128 (2023.02); H10K 59/50 (2023.02); G02F 1/1337 (2013.01); G02F 1/1339 (2013.01); G02F 1/13394 (2013.01); G02F 1/13398 (2021.01); G02F 1/133512 (2013.01); G02F 1/134345 (2021.01); G02F 1/136222 (2021.01); G02F 1/167 (2013.01); G02F 2201/44 (2013.01); G06F 2203/04102 (2013.01); G06F 2203/04103 (2013.01); G09G 3/3233 (2013.01); G09G 3/3648 (2013.01); G09G 3/3677 (2013.01); G09G 2300/023 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0247 (2013.01); G09G 2330/021 (2013.01); H10K 59/1201 (2023.02)] 16 Claims
OG exemplary drawing
 
1. A semiconductor device comprising a pixel, the pixel comprising:
a first transistor;
a first display element;
a second transistor;
a second display element;
a third transistor;
a first wiring electrically connected to one of a source electrode and a drain electrode of the first transistor and one of a source electrode and a drain electrode of the second transistor;
a second wiring electrically connected to a gate of the first transistor;
a third wiring electrically connected to a gate of the second transistor;
a fourth wiring electrically connected to one of a source electrode and a drain electrode of the third transistor;
a fifth wiring electrically connected to a first electrode of the first display element; and
a sixth wiring electrically connected to a first electrode of the second display element,
wherein the other of the source electrode and the drain electrode of the first transistor is directly connected to a second electrode of the first display element,
wherein the other of the source electrode and the drain electrode of the second transistor is electrically connected to a gate of the third transistor,
wherein the other of the source electrode and the drain electrode of the third transistor is electrically connected to a second electrode of the second display element, and
wherein the sixth wiring is not electrically connected to the first transistor.