| US 7,590,174 B2 | ||
| Signal adjustment receiver circuitry | ||
| Wilson Wong, San Francisco, Calif. (US); Rakesh H Patel, Cupertino, Calif. (US); Sergey Shumarayev, San Leandro, Calif. (US); and Tin H Lai, San Jose, Calif. (US) | ||
| Assigned to Altera Corporation, San Jose, Calif. (US) | ||
| Filed on Dec. 20, 2005, as Appl. No. 11/312,181. | ||
| Prior Publication US 2007/0140387 A1, Jun. 21, 2007 | ||
| Int. Cl. H03H 7/30 (2006.01); H03H 7/40 (2006.01); H03K 5/159 (2006.01) | ||
| U.S. Cl. 375—229 [375/230; 375/231; 375/232; 375/233] | 10 Claims |
| 1. Receiver circuitry for adjusting a digital signal, comprising:
an equalization circuit that provides frequency content adjustment;
a signal normalization circuit that is connected to an output of the equalization circuitry, wherein the signal normalization
circuit converts a digital signal amplitude to a normalized signal amplitude; and
a control circuit that is connected to the equalization circuit and to the signal normalization circuit, wherein the control
circuit controls the frequency content adjustment and controls the normalized signal amplitude,
wherein, for the equalization circuit, the control circuit controls the frequency content adjustment for frequencies above
a boundary frequency without controlling frequency content adjustment for frequencies below the boundary frequency.
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