| US 7,589,593 B2 | ||
| Amplifier circuit having stacked main amplifier and parallel sub-amplifier | ||
| Jie-Wei Lai, Taipei (Taiwan); and Min Chen, Fremont, Calif. (US) | ||
| Assigned to Mediatek Inc., Hsin-Chu (Taiwan) | ||
| Filed on Jan. 30, 2008, as Appl. No. 12/22,159. | ||
| Prior Publication US 2009/0189695 A1, Jul. 30, 2009 | ||
| Int. Cl. H03F 3/04 (2006.01); H03F 1/22 (2006.01) | ||
| U.S. Cl. 330—295 [330/311] | 12 Claims |
| 1. An amplifier circuit for amplifying an input signal to generate an output signal, comprising:
a stacked main amplifier, comprising:
a first amplifier unit, having an input node for receiving an input signal, and an output node for outputting a first amplified
signal generated from processing the input signal; and
a second amplifier unit, having an input node coupled to the output node of the first amplifier unit for receiving the first
amplified signal, and an output node for outputting a second amplified signal generated from processing the first amplified
signal, wherein the first amplifier unit and the second amplifier unit share bias current, and the first amplified signal
and the bias current have different coupling paths;
a parallel sub-amplifier, having an input node coupled to the input node of the first amplifier unit for receiving the input
signal, and an output node for outputting a third amplified signal generated from processing the input signal; and
a signal combiner, coupled to the output node of the second amplifier unit and the output node of the parallel sub-amplifier,
for combining the second amplified signal and the third amplified signal to generate the output signal.
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