| US 7,589,551 B1 | ||
| On-wafer AC stress test circuit | ||
| Yun-Chi Yang, Hsinchu County (Taiwan); Chao-Yung Lai, Miaoli County (Taiwan); Chao-Yang Lin, Hsinchu County (Taiwan); Cheng-Li Lin, Taoyuan County (Taiwan); and Kuan-Cheng Su, Hsinchu (Taiwan) | ||
| Assigned to United Microelectronics Corp., Hsin-Chu (Taiwan) | ||
| Filed on Apr. 23, 2008, as Appl. No. 12/107,772. | ||
| Int. Cl. G01R 31/26 (2006.01); G01R 31/02 (2006.01) | ||
| U.S. Cl. 324—769 [324/760; 324/763] | 15 Claims |
| 1. An alternating current (AC) stress test circuit for performing an AC stress test on a test device fabricated in a test
region on a semiconductor wafer, the AC stress test circuit comprising:
an oscillator module fabricated in the test region;
a diode module fabricated in the test region coupled to an output of the oscillator module; and
a select transistor fabricated in the test region having a gate terminal coupled to an output of the diode module, a second
terminal coupled to a gate of the test device, and a third terminal coupled to a test voltage source.
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