| US 7,589,388 B2 | ||
| Semiconductor device and method of manufacturing the same | ||
| Yuichi Morita, Kanagawa (Japan); Takashi Noma, Gunma (Japan); Hiroyuki Shinogi, Gunma (Japan); Shinzo Ishibe, Gunma (Japan); Katsuhiko Kitagawa, Gunma (Japan); Noboru Okubo, Saitama (Japan); Kazuo Okada, Gunma (Japan); and Hiroshi Yamada, Gunma (Japan) | ||
| Assigned to Sanyo Electric Co., Ltd., Osaka (Japan); and Sanyo Semiconductor Co., Ltd., Gunma (Japan) | ||
| Filed on Oct. 19, 2007, as Appl. No. 11/875,438. | ||
| Claims priority of application No. 2006-287249 (JP), filed on Oct. 23, 2006. | ||
| Prior Publication US 2008/0128914 A1, Jun. 05, 2008 | ||
| Int. Cl. H01L 23/48 (2006.01); H01L 23/52 (2006.01) | ||
| U.S. Cl. 257—448 [257/433; 257/690; 257/773; 257/779] | 4 Claims |
| 1. A semiconductor device comprising:
a semiconductor substrate comprising a front surface, a back surface and a side surface;
a device element formed on the front surface;
a pad electrode disposed on the front surface and electrically connected to the device element;
an insulation film covering the side surface and the back surface;
a wiring layer disposed on the side surface and electrically connected to the pad electrode;
a sidewall electrode disposed on the side surface so as to be electrically connected to the pad electrode through the wiring
layer; and
a protection layer disposed on the back surface,
wherein the sidewall electrode is exposed along the side surface and accommodated in an opening formed in the protection layer.
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