CPC H10B 43/27 (2023.02) [H10B 41/10 (2023.02); H10B 41/27 (2023.02); H10B 41/35 (2023.02); H10B 43/10 (2023.02); H10B 43/35 (2023.02)] | 21 Claims |
1. An integrated assembly, comprising:
a first deck having first memory cells arranged in first tiers disposed one atop another; the first deck having first inner lateral edges;
a second deck over the first deck; the second deck having second memory cells arranged in second tiers disposed one atop another; the second deck having second inner lateral edges;
an inter-deck structure between the first and second decks and comprising etch-stop material against the first deck; the inter-deck structure having an inter-deck material with third inner lateral edges which are laterally offset relative to the first and second inner lateral edges to leave cavities between the first and second decks; and
a pillar passing through the first and second decks and the inter-deck structure; the pillar comprising channel material, tunneling material, charge-storage material, charge-blocking material and dielectric-barrier material.
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