US 11,742,363 B2
Barrier stacks for printed and/or thin film electronics, methods of manufacturing the same, and method of controlling a threshold voltage of a thin film transistor
Raghav Sreenivasan, Fremont, CA (US); Aditi Chandra, Los Gatos, CA (US); and Yoocharn Jeon, San Jose, CA (US)
Assigned to Ensurge Micropower ASA, Oslo (NO)
Filed by Ensurge Micropower ASA, San Jose, CA (US)
Filed on Oct. 22, 2019, as Appl. No. 16/659,871.
Claims priority of provisional application 62/748,845, filed on Oct. 22, 2018.
Prior Publication US 2020/0127021 A1, Apr. 23, 2020
Int. Cl. H01L 27/12 (2006.01); H01L 21/311 (2006.01)
CPC H01L 27/1262 (2013.01) [H01L 27/1218 (2013.01); H01L 21/31111 (2013.01); H01L 21/31144 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A method of manufacturing a barrier stack, comprising:
forming, in sequence, on a substrate comprising a metal foil and containing a diffusible element and/or species, a first barrier layer, an insulator layer, and a second barrier layer, wherein the second barrier layer has an original thickness less than the first barrier layer;
forming a blocking mask in one or more first regions of the substrate; and
thinning the second barrier layer in the one or more first regions of the substrate without thinning the second barrier layer in one or more second regions of the substrate, wherein the second barrier layer in the one or more first regions of the substrate has a final thickness that is 5 to 75% of the original thickness after thinning.