US 11,742,355 B2
Semiconductor structure
Jisong Jin, Shanghai (CN)
Assigned to Semiconductor Manufacturing International (Shanghai) Corporation, Shanghai (CN); and Semiconductor Manufacturing International (Beijing) Corporation, Beijing (CN)
Filed by Semiconductor Manufacturing International (Shanghai) Corporation, Shanghai (CN); and Semiconductor Manufacturing International (Beijing) Corporation, Beijing (CN)
Filed on Jun. 23, 2022, as Appl. No. 17/847,728.
Application 17/847,728 is a division of application No. 17/249,495, filed on Mar. 3, 2021, granted, now 11,437,378.
Claims priority of application No. 202010147849.7 (CN), filed on Mar. 5, 2020.
Prior Publication US 2022/0328484 A1, Oct. 13, 2022
Int. Cl. H01L 29/76 (2006.01); H01L 29/94 (2006.01); H01L 31/062 (2012.01); H01L 27/092 (2006.01); H01L 21/8234 (2006.01); H01L 29/06 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01)
CPC H01L 27/0924 (2013.01) [H01L 21/823431 (2013.01); H01L 29/0649 (2013.01); H01L 29/66795 (2013.01); H01L 29/7851 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
a substrate, wherein the substrate includes a first region and a second region adjacent to the first region;
a plurality of fins formed over the first region of the substrate;
an isolation layer over the substrate between adjacent fins of the plurality of fins, wherein a top of the isolation layer is lower than a top surface of a fin of the plurality of fins, the isolation layer over the second region and the second region of the substrate together contain a power rail opening, and the substrate contains a through-hole at a bottom of the power rail opening; and
a first metal layer in the power rail opening and the through-hole, wherein a back surface of the first metal layer is above a back surface of the substrate.