CPC G06F 30/39 (2020.01) [G06F 30/17 (2020.01); G06F 30/20 (2020.01); G06F 30/27 (2020.01); G06F 30/398 (2020.01); G06F 2115/08 (2020.01)] | 20 Claims |
1. A computer-implemented method of automatically generating an electronic circuit IP block, comprising:
obtaining manufacturing processes and design rules from an external source;
defining an electronic circuit to be fabricated;
preparing a circuit schematic of the defined electronic circuit, the circuit schematic containing electrical information and constraints corresponding to the defined electronic circuit; and
generating an IP block for the defined electronic circuit based on the circuit schematic, the IP block being compliant with the manufacturing processes, design rules, electrical information, and constraints.
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