US 11,741,034 B2
Memory device including direct memory access engine, system including the memory device, and method of operating the memory device
Heehyun Nam, Seoul (KR); Jeongho Lee, Gwacheon-si (KR); Wonseb Jeong, Hwaseong-si (KR); Ipoom Jeong, Hwaseong-si (KR); and Hyeokjun Choe, Hwaseong-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Jul. 7, 2021, as Appl. No. 17/368,981.
Claims priority of application No. 10-2020-0148133 (KR), filed on Nov. 6, 2020.
Prior Publication US 2022/0147476 A1, May 12, 2022
Int. Cl. G06F 13/28 (2006.01); G06F 3/06 (2006.01)
CPC G06F 13/28 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0655 (2013.01); G06F 3/0679 (2013.01); G06F 2213/28 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory device configured to communicate with a plurality of host devices, through an interconnect, the memory device comprising:
a memory comprising a plurality of memory regions that comprises a first memory region that is assigned to a first host device and a second memory region that is assigned to a second host device; and
a direct memory access (DMA) engine configured to, based on a request from the first host device, the request comprising a copy command to copy data that is stored in the first memory region to the second memory region:
read the stored data from the first memory region; and
write the read data to the second memory region without outputting the read data to the interconnect.