| US 7,583,158 B2 | ||
| PWM signal generating circuit | ||
| Mitsugu Makita, Nagoya (Japan); Yoshitaka Ojima, Toyota (Japan); and Yoshinobu Kume, Seto (Japan) | ||
| Assigned to Toyota Jidosha Kabushiki Kaisha, Toyota-shi (Japan) | ||
| Appl. No. 11/815,155 PCT Filed Sep. 12, 2006, PCT No. PCT/IB2006/002499 § 371(c)(1), (2), (4) Date Jul. 31, 2007, PCT Pub. No. WO2007/031840, PCT Pub. Date Mar. 22, 2007. |
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| Claims priority of application No. 2005-265826 (JP), filed on Sep. 13, 2005. | ||
| Prior Publication US 2008/0204161 A1, Aug. 28, 2008 | ||
| Int. Cl. H03K 7/08 (2006.01); H03B 19/00 (2006.01); H03K 3/04 (2006.01) | ||
| U.S. Cl. 332—109 [323/283; 327/113; 327/182] | 9 Claims |
| 1. A PWM resolution increase signal generating circuit, comprising:
a common PWM signal generating circuit portion that generates a common digital PWM signal having a resolution of 2n based on a clock signal CLK and n-bits (n≧1) of digital information;
a triangular wave generator that generates a triangular wave synchronized with the clock signal CLK; and
a comparator that compares the triangular wave with a threshold value, wherein
the PWM resolution increase signal generating circuit increases the resolution of the common digital PWM signal based on an
output from the comparator.
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