| US 7,580,491 B2 | ||
| Quarter-rate clock recovery circuit and clock recovering method using the same | ||
| Nyun-Tae Kim, Yongin-si (Korea, Republic of); Ki-Mio Ueda, Seoul (Korea, Republic of); Hwa-Su Koh, Seongnam-si (Korea, Republic of); and Dae-Seung Jeong, Seoul (Korea, Republic of) | ||
| Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (Korea, Republic of) | ||
| Filed on Aug. 01, 2005, as Appl. No. 11/193,329. | ||
| Claims priority of application No. 10-2004-0061262 (KR), filed on Aug. 04, 2004. | ||
| Prior Publication US 2006/0029160 A1, Feb. 09, 2006 | ||
| Int. Cl. H04L 7/00 (2006.01) | ||
| U.S. Cl. 375—354 [375/375; 375/376; 375/371; 375/373; 341/143; 455/403] | 19 Claims |
| 1. A clock recovery circuit comprising:a clock generator adapted to generate first, second, third, and fourth clocks having a quarter frequency of a data-rate of
input data, and the second, third, and fourth clocks with respect to a phase of the first clock having phase differences of
90, 180, and 270 degrees, respectively;
a phase interpolation unit adapted to perform a phase interpolation on the first, second, third, and fourth clocks to generate
fifth, sixth, seventh, and eighth clocks, respectively, each having a quarter frequency of the data-rate of the input data,
wherein the fifth clock tracks a phase of the input data, and the sixth, seventh, and eighth clocks having phase differences
of 45, 90, and 135 degrees with respect to a phase of the fifth clock, respectively;
a phase detector adapted to output signals corresponding to phase differences between the input data and the fifth, sixth,
seventh, and eighth clocks; and
a controller adapted to receive the output signals from the phase detector and to generate control signals to control the
phase interpolation unit,
wherein the phase interpolation unit includes
a first phase interpolator adapted to generate the fifth clock based on the control signals and the first, second, third,
and fourth clocks,
a second phase interpolator adapted to generate the sixth clock,
a third phase interpolator adapted to generate the seventh clock, and
a fourth phase interpolator adapted to generate the eighth clock.
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