| US 7,579,867 B2 | ||
| Restructuring data from a trace buffer of a configurable IC | ||
| Brad Hutchings, Provo, Utah (US); Steven Teig, Menlo Park, Calif. (US); and Amit Gupta, San Jose, Calif. (US) | ||
| Assigned to Tabula Inc., Santa Clara, Calif. (US) | ||
| Filed on Jun. 27, 2007, as Appl. No. 11/769,706. | ||
| Prior Publication US 2009/0002021 A1, Jan. 01, 2009 | ||
| Int. Cl. H03K 19/177 (2006.01); H04L 7/00 (2006.01) | ||
| U.S. Cl. 326—41 [326/21; 326/47; 375/371] | 13 Claims |
| 1. For an integrated circuit (IC) comprising a plurality of configurable circuits for configurably performing a plurality
of operations and a trace buffer for receiving data from said configurable circuits, a method comprising:
receiving from said trace buffer of said IC a first set of data bits, wherein a skewed subset of said first set of data bits
is simultaneously generated in said configurable circuits and at least two data bits of said skewed subset do not reach said
trace buffer simultaneously;
determining a set of relative delay values for the skewed subset of data bits; and
based on said set of relative delay values, extracting the skewed subset of data bits from the first set of data bits to produce
a second set of temporally aligned data bits, wherein the trace buffer is also for storing data from said IC.
|