| US 7,579,859 B2 | ||
| Method for determining time dependent dielectric breakdown | ||
| Pei-Chun Liao, Jhubei (Taiwan); and Chia-Lin Chen, Jhubei (Taiwan) | ||
| Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu (Taiwan) | ||
| Filed on Jun. 14, 2007, as Appl. No. 11/763,077. | ||
| Prior Publication US 2008/0309365 A1, Dec. 18, 2008 | ||
| Int. Cl. G01R 31/26 (2006.01) | ||
| U.S. Cl. 324—769 [324/766] | 25 Claims |
| 1. A method of determining a time dependent electrical breakdown characteristic of a dielectric layer in a semiconductor device
comprising:
providing a plurality of samples of dielectric layer disposed as a gate dielectric layer of a MOS transistor;
performing a first linear regression fit on data representing a logarithm of a source/drain current density distribution and
data representing a logarithm of voltages applied on said samples;
performing a second linear regression fit on data representing a logarithm of a substrate current density distribution and
the data representing the logarithm of voltages applied on said samples;
performing a third linear regression fit on data representing a logarithm of a dielectric layer lifetime distribution and
second data representing a logarithm of the source/drain current density distribution and the substrate current density distribution
on said samples;
deriving, from said first, second, and third linear regression fits, an empirical model wherein a dielectric layer lifetime
is a function of voltage applied thereon; and
using said model to determine dielectric layer lifetime at a pre-determined operating gate voltage.
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