US 7,579,696 B2
Semiconductor device
Sachiyo Ito, Kanagawa (Japan); and Masahiko Hasunuma, Kanagawa (Japan)
Assigned to Kabushiki Kaisha Toshiba, Tokyo (Japan)
Filed on Jun. 19, 2008, as Appl. No. 12/142,312.
Claims priority of application No. 2007-184955 (JP), filed on Jul. 13, 2007.
Prior Publication US 2009/0014882 A1, Jan. 15, 2009
Int. Cl. H01L 23/48 (2006.01); H01L 23/52 (2006.01)
U.S. Cl. 257—784  [257/758; 257/762; 257/766; 257/773] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
an effective wire formed above a substrate in a multilayer interconnection structure and having a first electrode pad in a top layer;
a first reinforcing material formed in the multilayer interconnection structure like surrounding the effective wire;
a protective film configured to protect a final surface of the multilayer interconnection structure; and
a second reinforcing material formed at a position in contact with the protective film and also between an area in which the effective wire is formed and a chip area end, the second reinforcing material being constituted by a film pattern whose Young's modulus is larger than that of a conductor constituting the first electrode pad and that of a conductor constituting the first reinforcing material.