US 7,579,677 B2
Semiconductor device and method for manufacturing thereof
Osamu Ikeda, Yokohama (Japan); Masahide Okamoto, Yokohama (Japan); Hidemasa Kagii, Takasaki (Japan); Hiroi Oka, Tamamura (Japan); and Hiroyuki Nakamura, Takasaki (Japan)
Assigned to Renesas Technology Corp., Tokyo (Japan)
Filed on Oct. 25, 2006, as Appl. No. 11/585,879.
Claims priority of application No. 2005-311047 (JP), filed on Oct. 26, 2005.
Prior Publication US 2007/0089811 A1, Apr. 26, 2007
Int. Cl. H01L 23/495 (2006.01)
U.S. Cl. 257—676  [257/E23.04] 6 Claims
OG exemplary drawing
 
1. A semiconductor device having a semiconductor element and a frame to which the semiconductor element is bonded,
wherein said frame is plated with Ni on the surface thereof, and
a joint between the semiconductor element and the frame includes, from the semiconductor element side, a laminated structure comprising: a first intermetallic compound layer having a melting point of 260° C or higher; a first Cu layer; a metal layer having a melting point of 260° C. or higher; a second Cu layer; and a second intermetallic compound layer having a melting point of 260° C. or higher.