| US 7,579,241 B2 | ||
| Semiconductor device and method of manufacture thereof | ||
| Katsuhiko Hieda, Yokohama (Japan); and Daisuke Hagishima, Tokyo (Japan) | ||
| Assigned to Kabushiki Kaisha Toshiba, Tokyo (Japan) | ||
| Filed on Apr. 25, 2007, as Appl. No. 11/790,391. | ||
| Application 11/790391 is a division of application No. 11/064453, filed on Feb. 24, 2005, granted, now 7,224,019. | ||
| Claims priority of application No. 2004/048170 (JP), filed on Feb. 24, 2004. | ||
| Prior Publication US 2007/0287245 A1, Dec. 13, 2007 | ||
| Int. Cl. H01L 21/8247 (2006.01) | ||
| U.S. Cl. 438—259 [438/264; 257/E21.176] | 6 Claims |
| 1. A method of manufacturing a semiconductor device comprising:
forming an island semiconductor portion comprising a first side surface and a second side surface opposed to the first side
surface in a main surface of a semiconductor substrate or above the semiconductor substrate by forming a trench in the main
surface of the semiconductor substrate;
forming a first insulating film on a top surface of the island semiconductor portion;
forming a second insulating film on the first and second side surfaces of the island semiconductor portion
forming a first conductive film on a region including the island semiconductor portion, the first insulating film, and the
second insulating film;
forming a charge storage layer selectively on a side surface of the first insulating film and a side surface of the second
insulating film by overall etching of the first conductive film such that the first conductive film remains on both the side
surface of the first insulating film and the side surface of the second insulating film, the charge storage layer comprising
a first sidewall provided on the first side surface of the island semiconductor portion and a second sidewall provided on
the second side surface of the island semiconductor portion;
forming a third insulating film on the charge storage layer; and
forming a control gate electrode on the third insulating film.
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