| US 7,579,216 B2 | ||
| Method of manufacturing a semiconductor device | ||
| Tadashi Munakata, Nanae (Japan); Shingo Oosaka, Hakodate (Japan); Mitsuru Kinoshita, Hakodate (Japan); Yoshihiko Yamaguchi, Iide (Japan); and Noriyuki Takahashi, Yonezawa (Japan) | ||
| Assigned to Renesas Technology Corp., Tokyo (Japan); and Renesas Northern Japan Semiconductor, Inc., Chitose-shi, Hokkaido (Japan) | ||
| Filed on May 12, 2008, as Appl. No. 12/118,752. | ||
| Application 11/360512 is a division of application No. 10/462463, filed on Jun. 17, 2003, granted, now 7,033,857. | ||
| Application 12/118752 is a continuation of application No. 11/360512, filed on Feb. 24, 2006, granted, now 7,384,820. | ||
| Claims priority of application No. 2002-211939 (JP), filed on Jul. 22, 2002. | ||
| Prior Publication US 2008/0286902 A1, Nov. 20, 2008 | ||
| Int. Cl. H01L 21/58 (2006.01) | ||
| U.S. Cl. 438—113 [257/E21.505] | 8 Claims |
| 1. A method of manufacturing a semiconductor device comprising the steps of:
(a) providing a wiring substrate having a main surface, a plurality of device areas formed on the main surface, a back surface
opposite the main surface, and a dicing area arranged between the plurality of device areas;
(b) after step (a), fixing a plurality of semiconductor chips on the plurality of device areas, respectively;
(c) after step (b), forming a block sealing member over the main surface of the wiring substrate, the block sealing member
covering the plurality of semiconductor chips;
(d) after step (c), attaching a plurality of external terminals on the back surface of the wiring substrate such that the
plurality of external terminals are corresponding to the plurality of device areas, respectively;
(e) after step (d), disposing the wiring substrate over a dicer cutting stage by way of a substrate holding jig, the substrate
holding jig having a product support portion, the product support portion having a groove corresponding to the dicing area
of the wiring substrate, and a plurality of through holes corresponding to the plurality of device areas of the wiring substrate,
respectively; and
(f) after step (e), dividing the block sealing member and the wiring substrate by running a dicing blade from the back surface
of the wiring substrate and along the dicing area while chucking an upper surface of the block sealing member by way of a
chucking hole formed on the dicer cutting stage and the plurality of through holes formed on the product support portion,
wherein, in step (e), the wiring substrate is disposed over the substrate holding jig such that the upper surface of the block
sealing member faces the product support portion, and
wherein, in step (e), the wiring substrate is disposed over the substrate holding jig such that the groove and the plurality
of through holes correspond to the dicing area and the plurality of device areas, respectively.
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