| US 7,576,000 B2 | ||
| Molded dielectric layer in print-patterned electronic circuits | ||
| Jurgen H. Daniel, San Francisco, Calif. (US); and Ana C. Arias, San Carlos, Calif. (US) | ||
| Assigned to Palo Alto Research Center Incorporated, Palo Alto, Calif. (US) | ||
| Filed on Dec. 22, 2006, as Appl. No. 11/615,229. | ||
| Prior Publication US 2008/0150187 A1, Jun. 26, 2008 | ||
| Int. Cl. H01L 21/4763 (2006.01) | ||
| U.S. Cl. 438—637 [438/780; 438/781; 257/E23.134] | 20 Claims |
| 1. A method, comprising:
forming a first active electronic layer having selected areas on a substrate;
printing an array of pillars in the selected areas on the first active electronic layer;
dispensing a curable polymer over the array of pillars;
molding the curable polymer by contacting the curable polymer with a mold structure to displace the curable polymer from upper
surfaces of the pillars;
curing the curable polymer to produce a hardened polymer; and
removing the array of pillars to leave an array of holes in the hardened polymer.
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