CPC H10B 20/50 (2023.02) [G11C 7/18 (2013.01); H01L 21/76816 (2013.01); H01L 21/76877 (2013.01); H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H01L 27/0688 (2013.01); H01L 2924/0002 (2013.01)] | 20 Claims |
1. A method of making a semiconductor device, the method comprising:
forming a first memory device;
connecting a first word line to the first memory device;
forming at least a first via;
forming a second memory device, wherein the first and second memory devices are separated by an inter-layer dielectric (ILD), and the first via connects the first memory device and the second memory device;
connecting a second word line to the second memory device;
connecting a bit line to the first memory device,
wherein the first word line is connected to the second word line by the first via, and the first via is directly connected to at least the first word line.
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