US 11,720,737 B2
Semiconductor structure, device, and method
Shih-Wei Peng, Hsinchu (TW); Jiann-Tyng Tzeng, Hsinchu (TW); and Wei-Cheng Lin, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Apr. 12, 2021, as Appl. No. 17/227,780.
Application 17/227,780 is a continuation of application No. 16/571,809, filed on Sep. 16, 2019, granted, now 10,977,417.
Claims priority of provisional application 62/738,973, filed on Sep. 28, 2018.
Prior Publication US 2021/0233990 A1, Jul. 29, 2021
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 7/50 (2006.01); G06F 30/398 (2020.01); G03F 1/70 (2012.01); G03F 1/36 (2012.01); G09G 3/3208 (2016.01); H10K 59/131 (2023.01); H10K 59/35 (2023.01); H01L 27/12 (2006.01); H01L 27/118 (2006.01)
CPC G06F 30/398 (2020.01) [G03F 1/36 (2013.01); G03F 1/70 (2013.01); G09G 3/3208 (2013.01); H10K 59/131 (2023.02); H10K 59/353 (2023.02); H01L 27/1248 (2013.01); H01L 2027/11881 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A structure comprising:
a first transistor of a first type, the first transistor comprising a first channel, a first conductive segment, and a second conductive segment;
a second transistor of a second type, the second transistor comprising a second channel, a third conductive segment, and a fourth conductive segment; and
a gate, wherein
the first channel extends through the gate between the first and second conductive segments,
the second channel extends through the gate between the third and fourth conductive segments and is aligned with the first channel at a center of the first transistor,
the first and third conductive segments extend away from the center of the first transistor in opposite directions, and
the second and fourth conductive segments extend away from the center of the first transistor in opposite directions.