US 11,720,458 B2
Memory block age detection
Shih-Lien Linus Lu, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED, Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company Limited, Hsinchu (TW)
Filed on Apr. 7, 2022, as Appl. No. 17/715,421.
Application 17/715,421 is a continuation of application No. 16/900,691, filed on Jun. 12, 2020, granted, now 11,301,343.
Prior Publication US 2022/0229750 A1, Jul. 21, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 12/00 (2006.01); G06F 11/22 (2006.01); G06F 11/07 (2006.01); G06F 11/30 (2006.01); G06F 12/02 (2006.01); G11C 29/04 (2006.01)
CPC G06F 11/2284 (2013.01) [G06F 11/073 (2013.01); G06F 11/076 (2013.01); G06F 11/3037 (2013.01); G06F 12/0246 (2013.01); G11C 2029/0407 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An age detector comprising:
a storage block to store a first set of data generated by a memory block in response to a first power on;
an inconsistency detector coupled to the storage block, the inconsistency detector to compare the first set of data and a second set of data generated by the memory block in response to a second power on; and
a controller coupled to the inconsistency detector, the controller to determine an age of the memory block, based on the comparison.