US 11,719,584 B2
Complementary ring oscillators to monitor in-situ stress within integrated circuits
Shiqun Gu, San Diego, CA (US); and Hong Liu, Shanghai (CN)
Assigned to Huawei Technologies Co., Ltd., Shenzhen (CN)
Filed by Huawei Technologies Co., Ltd., Shenzhen (CN)
Filed on Jun. 18, 2021, as Appl. No. 17/351,675.
Application 17/351,675 is a continuation of application No. PCT/CN2019/124422, filed on Dec. 11, 2019.
Claims priority of provisional application 62/783,474, filed on Dec. 21, 2018.
Prior Publication US 2021/0310880 A1, Oct. 7, 2021
Int. Cl. G01R 31/28 (2006.01); G01K 7/42 (2006.01); G01R 31/26 (2020.01); H01L 23/34 (2006.01)
CPC G01K 7/425 (2013.01) [G01R 31/2628 (2013.01); G01R 31/2856 (2013.01); H01L 23/34 (2013.01)] 38 Claims
OG exemplary drawing
 
1. A stress sensor, comprising:
a first ring oscillator circuit on an integrated circuit comprising first one or more inverter stages, each inverter stage of the first one or more inverter stages having a first P-channel metal-oxide-semiconductor field-effect transistor (PMOS) device and a first N-channel metal-oxide-semiconductor field-effect transistor (NMOS) device connected in series between a high voltage supply level and a low voltage supply level such that the first NMOS device limits first current flowing through each inverter stage of the first one or more inverter stages relative to the first PMOS device;
a second ring oscillator circuit on the integrated circuit in proximity to the first ring oscillator circuit, the second ring oscillator circuit comprising second one or more inverter stages, each inverter stage of the second one or more inverter stages having a second PMOS device and a second NMOS device connected in series between the high voltage supply level and the low voltage supply level such that the second PMOS device limits second current flowing through each inverter stage of the second one or more inverter stages relative to the second NMOS device; and
a stress determination circuit configured to receive a first frequency signal generated by the first ring oscillator circuit and a second frequency signal generated by the second ring oscillator circuit and to determine, from the first frequency signal and the second frequency signal, a first stress value for a first stress level along a first stress direction of the integrated circuit and a second stress value for a second stress level along a second stress direction of the integrated circuit, the second stress direction being non-parallel to the first stress direction.