| US 7,574,342 B2 | ||
| Methods of model compilation for models used in an electronic circuit simulator | ||
| Kenneth S. Kundert, Los Altos, Calif. (US) | ||
| Assigned to Cadence Design Systems, Inc., San Jose, Calif. (US) | ||
| Filed on Oct. 21, 2005, as Appl. No. 11/255,903. | ||
| Application 11/255903 is a continuation of application No. 10/965311, filed on Oct. 20, 2004, abandoned. | ||
| Prior Publication US 2006/0248518 A1, Nov. 02, 2006 | ||
| Int. Cl. G06F 17/50 (2006.01) | ||
| U.S. Cl. 703—13 | 10 Claims |
| 1. A method of compiling a model for use in a simulation of a system by a simulator that uses one or more models to represent
one or more components of the system, the method comprising:
receiving a hardware description language (HDL) description of the model;
receiving a parameter value for at least one parameter within the description;
automatically converting the HDL description into an implementation of the model;
wherein converting includes inputting the received parameter value into the received model description;
wherein the implementation of the model comprises one of an executable form of the model that includes the inputted parameter
value targeted to a particular simulation engine or an intermediate representation of the model that includes the inputted
parameter value and that is suited for re-targeting to multiple simulation engines; and
saving the implementation of the model to a computer readable medium.
|