US 7,573,472 B2
Drive circuit, display device, and driving method
Tadashi Aoki, Kanagawa (Japan); Kazunori Katakura, Kanagawa (Japan); Aoji Isono, Kanagawa (Japan); Kazuhiko Murayama, Kanagawa (Japan); and Kenji Shino, Kanagawa (Japan)
Assigned to Canon Kabushiki Kaisha, Tokyo (Japan)
Filed on Nov. 02, 2005, as Appl. No. 11/264,162.
Application 11/264162 is a division of application No. 10/167666, filed on Jun. 13, 2002, granted, now 6,995,516.
Claims priority of application No. 2001/181841 (JP), filed on Jun. 15, 2001; application No. 2001/248978 (JP), filed on Aug. 20, 2001; application No. 2001/296397 (JP), filed on Sep. 27, 2001; and application No. 2002/167096 (JP), filed on Jun. 07, 2002.
Prior Publication US 2006/0050030 A1, Mar. 09, 2006
Int. Cl. G09G 3/10 (2006.01)
U.S. Cl. 345—208  [345/76; 345/77; 345/204; 345/205; 315/169.3; 315/169.4] 26 Claims
OG exemplary drawing
 
1. A drive circuit for driving a device, wherein the drive circuit comprises a circuit which outputs at least one driving signal having a driving waveform whose pulse width is controlled in a unit of slot width Δt and whose level in each slot is predetermined as one of A1 to An, where n is an integer equal to or larger than 2, A1<A2< . . . <An, A1 to An correspond to non-zero gradation levels, and for all of the driving waveforms having a rising portion up to a predetermined level Ak, where k is an integer equal to or larger than 2 and equal to or smaller than n, the rising portion rises up to the predetermined level Ak through a level corresponding to a non-zero gradation level smaller than Ak in order at least by one slot from a level A1 to a level Ak−1.