US 7,573,302 B2
Differential signal comparator
Hiroyuki Nakamura, Atsugi (Japan)
Assigned to Canon Kabushiki Kaisha, Tokyo (Japan)
Filed on Dec. 20, 2007, as Appl. No. 11/961,682.
Claims priority of application No. 2007-021439 (JP), filed on Jan. 31, 2007.
Prior Publication US 2008/0180173 A1, Jul. 31, 2008
Int. Cl. H03K 5/153 (2006.01)
U.S. Cl. 327—89  [327/66; 327/67; 327/359] 4 Claims
OG exemplary drawing
 
1. A differential signal comparator for converting difference voltage between complementary input signals into a voltage of CMOS level, wherein the complementary input signals are input into first and second differential amplifier circuits complementary to each other, the first differential amplifier circuit outputs first and second currents, the second differential amplifier circuit outputs third and fourth currents, the first and second currents are output into first and second current amplification circuits, the third and fourth currents are output into third and fourth current amplification circuits, outputs from the first to fourth current amplification circuits are input into a current arithmetic operation circuit, the current arithmetic operation circuit outputs complementary current based on the complementary input signals, the complementary current output is current-voltage converted, and the converted signal is input into a differential comparator of CMOS level input, and further converted into a single end CMOS level output.