US 7,573,284 B2
Increase productivity at wafer test using probe retest data analysis
Akiko F. Balchiunas, Hinesburg, Vt. (US)
Assigned to International Business Machines Corporation, Armonk, N.Y. (US)
Filed on Jul. 09, 2008, as Appl. No. 12/169,670.
Application 12/169670 is a continuation of application No. 11/736600, filed on Apr. 18, 2007, granted, now 7,463,047.
Application 11/736600 is a continuation of application No. 10/709729, filed on May 25, 2004, granted, now 7,253,650.
Prior Publication US 2008/0270057 A1, Oct. 30, 2008
Int. Cl. G01R 31/26 (2006.01)
U.S. Cl. 324—765  [324/73.1] 15 Claims
OG exemplary drawing
 
1. A system for testing integrated circuit devices after manufacture, said system comprising:
a tester testing and retesting devices;
a database comprising a listing of types of defects approved for retesting, wherein said types of defects approved for retesting are based upon previously acquired statistics that indicate which types of defects have retest passing rates, after initially failing testing, above a predetermined threshold; and
a processor in communication with said tester and said database, wherein said processor performs the following:
directs said tester to test a group of devices to produce a failing group of devices that failed said testing, said devices in said failing group being identified by type of defect;
sorts said failing group into devices that have at least one of said types of defects approved for retesting and into devices that do not have said types of defects approved for retesting; and
directs said tester to retest only said devices in said failing group that have at least one of said types of defects approved for retesting.