US 7,573,084 B2
Non-volatile semiconductor memory device and method for fabricating the same
Yoshinori Kumura, Kanagawa-ken (Japan); Tohru Ozaki, Tokyo (Japan); and Iwao Kunishima, Kanagawa-ken (Japan)
Assigned to Kabushiki Kaisha Toshiba, Tokyo (Japan)
Filed on Sep. 18, 2007, as Appl. No. 11/898,949.
Claims priority of application No. 2006-259509 (JP), filed on Sep. 25, 2006.
Prior Publication US 2008/0073682 A1, Mar. 27, 2008
Int. Cl. H01L 27/108 (2006.01)
U.S. Cl. 257—295  [257/297; 257/310] 20 Claims
OG exemplary drawing
 
1. A non-volatile semiconductor memory device, comprising:
a ferroelectric capacitor being stacked a first electrode, a ferroelectric film and a second electrode in order;
a first protective film with hydrogen barrier performance, the first protective film being formed under the first electrode and on a side-wall of the ferroelectric capacitor, the first protective film being widened from the second electrode towards the first electrode;
a second protective film with hydrogen barrier performance, the second protective film being formed over the second electrode and on the first protective film formed on the side-wall of the ferroelectric capacitor, the second protective film being widened from the first electrode towards the second electrode;
a cell transistor, a source of the cell transistor being connected to the first electrode, a drain of the cell transistor being connected to a bit line and a gate being connected to a word line.