| US 7,572,331 B2 | ||
| Method of manufacturing a wafer | ||
| Konstantin Bourdelle, Crolles (France); Ian Cayrefourcq, St. Nazaire les Eymes (France); and Mark Kennard, Crolles (France) | ||
| Assigned to S.O.I.Tec Silicon on Insulator Technologies, Bernin (France) | ||
| Filed on Sep. 08, 2006, as Appl. No. 11/518,366. | ||
| Application 11/518366 is a continuation of application No. 10/916254, filed on Aug. 11, 2004, granted, now 7,407,548. | ||
| Claims priority of application No. 04290547 (EP), filed on Mar. 01, 2004. | ||
| Prior Publication US 2007/0000435 A1, Jan. 04, 2007 | ||
| This patent is subject to a terminal disclaimer. | ||
| Int. Cl. C30B 25/18 (2006.01) | ||
| U.S. Cl. 117—86 [117/94; 117/95; 117/96; 117/104; 117/935] | 22 Claims |
| 1. A method of manufacturing an epitaxial layer of a second material which comprises:
growing the epitaxial layer on a working surface of a substrate of a first material,
wherein the first and second materials are selected to have different lattices, and
wherein the substrate is selected to have a working surface presenting a certain defect density such that an epitaxial layer
grown thereon has a higher quality than an epitaxial layer grown on the substrate if it were to have a lesser defect density.
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