| US 7,570,526 B2 | ||
| Memory device and method of repairing the same | ||
| Jung Chul Han, Daejeon (Korea, Republic of) | ||
| Assigned to Hynix Semiconductor Inc., Icheon-si (Korea, Republic of) | ||
| Filed on Dec. 28, 2006, as Appl. No. 11/617,226. | ||
| Claims priority of application No. 2006-106494 (KR), filed on Oct. 31, 2006. | ||
| Prior Publication US 2008/0112240 A1, May 15, 2008 | ||
| Int. Cl. G11C 29/00 (2006.01) | ||
| U.S. Cl. 365—200 [365/185.09; 365/201] | 17 Claims |
| 1. A memory device comprising:
a main cell array including a plurality of first memory cells configured to store data, wherein a special block for storing
a column address corresponding to at least one first memory cell having at least one failure is disposed in an area of the
main cell array;
an address block configured to store address information of the special block; and
a repair information block configured to output a repair controlling signal according to the column address stored in the
special block when the memory device is in operation, wherein the repair information block comprises:
a plurality of registers each configured to store the column address stored in the special block; and
a plurality of repair circuits respectively coupled to the plurality of registers, wherein each repair circuit is configured
to output the repair controlling signal.
|