| US 7,570,096 B2 | ||
| Direct digital synthesizer with variable reference for improved spurious performance | ||
| Nicholas G. Cafaro, Coconut Creek, Fla. (US); Thomas L. Gradishar, Boynton Beach, Fla. (US); and Robert E. Stengel, Pompano Beach, Fla. (US) | ||
| Assigned to Motorola, Inc., Schaumburg, Ill. (US) | ||
| Filed on Sep. 26, 2007, as Appl. No. 11/861,860. | ||
| Application 11/861860 is a division of application No. 11/370689, filed on Mar. 08, 2006, granted, now 7,315,215. | ||
| Prior Publication US 2008/0258791 A1, Oct. 23, 2008 | ||
| Int. Cl. H03H 11/26 (2006.01) | ||
| U.S. Cl. 327—262 [327/264; 327/270; 327/271; 327/272; 327/288] | 6 Claims |
| 1. A structure for reducing mismatch error in a delay line, comprising:
a delay line with a plurality of tap outputs;
a plurality of independently programmable delay elements each placed at a respective one of the plurality of tap outputs;
and
wherein the independently programmable delay elements are operable to be independently adjusted to compensate for mismatch
error at their respective tap output of the plurality of tap outputs.
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