| US 7,568,278 B2 | ||
| Method of manufacturing inductor | ||
| Jae-Won Han, Suwon-si (Korea, Republic of) | ||
| Assigned to Dongbu Hitek Co., Ltd., Seoul (Korea, Republic of) | ||
| Filed on Sep. 05, 2007, as Appl. No. 11/896,663. | ||
| Claims priority of application No. 10-2006-0088426 (KR), filed on Sep. 13, 2006. | ||
| Prior Publication US 2008/0060185 A1, Mar. 13, 2008 | ||
| Int. Cl. H01F 3/00 (2006.01); H01F 41/02 (2006.01) | ||
| U.S. Cl. 29—604 [29/602.1; 29/847; 29/852; 216/62; 216/65; 216/66; 336/110; 336/175; 336/178; 336/184; 336/214; 363/17; 363/48; 363/58] | 6 Claims |
| 1. A method for manufacturing an inductor using a system-in-package (SIP), the method comprising:
forming a penetration hole in a silicon substrate, depositing a first barrier metal in an inner wall of the first penetration
hole, entirely filling the first penetration hole with a first metal material, and planarizing the metal material to form
a first penetration electrode;
depositing an insulating film on a first surface of the silicon substrate including the first penetration electrode, and patterning
the insulating film to form an inductor hole and a second penetration hole aligned with the first penetration hole;
depositing a second barrier metal in inner walls of the inductor hole and the second penetration hole, entirely filling the
inductor hole and the second penetration hole with a second metal material, and planarizing the second metal material to form
an inductor and a second penetration electrode; and
depositing a protective film on the insulating film and performing a back grind process such that the first penetration electrode
is exposed from a second surface of the silicon substrate, the second surface being opposed to the first surface.
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