| US 7,567,641 B2 | ||
| Sample rate conversion systems with an independent internal oscillator | ||
| Gautham D. Kamath, Austin, Tex. (US) | ||
| Assigned to Cirrus Logic, Inc., Austin, Tex. (US) | ||
| Filed on Jun. 16, 2004, as Appl. No. 10/869,721. | ||
| Prior Publication US 2005/0282513 A1, Dec. 22, 2005 | ||
| Int. Cl. H03D 3/24 (2006.01) | ||
| U.S. Cl. 375—376 [310/331; 329/346; 329/358; 329/359; 330/137; 332/139; 332/141; 361/203] | 25 Claims |
| 1. A digital signal processing system comprising:
a sample rate conversion (SRC) circuit to receive an input signal sampled at a frequency fsi into an output signal sampled
at a frequency fso, wherein the SRC circuit comprises an internal oscillator, having a frequency derived internally and independent
of any non-power supply related signal external to the SRC, to provide an operating clock signal to the SRC circuit, wherein
the internal oscillator comprises:
an inverter; and
a circuit path having a signal propagation delay greater than or equal to a critical path propagation delay in the SRC circuit.
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