| US 7,567,108 B2 | ||
| Apparatus and method for generating clock signal | ||
| Sen-Huang Tang, Hsinchu (Taiwan); and Wen-Chung Lai, Taipei (Taiwan) | ||
| Assigned to Realtek Semiconductor Corp., Hsinchu (Taiwan) | ||
| Filed on Jun. 13, 2007, as Appl. No. 11/818,034. | ||
| Application 11/818034 is a continuation in part of application No. 11/035086, filed on Jan. 13, 2005, abandoned. | ||
| Claims priority of application No. 93101101 A (TW), filed on Jan. 16, 2004. | ||
| Prior Publication US 2007/0247207 A1, Oct. 25, 2007 | ||
| Int. Cl. G06F 1/04 (2006.01) | ||
| U.S. Cl. 327—291 [327/293] | 10 Claims |
| 1. An apparatus for generating an output clock, comprising:
a control logic utilized for receiving a transmitted signal having at least one data segment and at least one synchronization
signal, and generating a reference signal according to the synchronization signal;
a measuring unit, coupled to the control logic, for generating a measured signal according to the reference signal and a clock
signal;
an output unit, coupled to the measuring unit, for generating the output clock according to the measured signal and the clock
signal; and a free-run clock generator for generating the clock signal; wherein, the control logic further comprises an edge
detector for detecting edges of waveform of the synchronization signal and a signal generator for generating the reference
signal; wherein, the measuring unit further comprises a counter and a divider, said counter is for counting the reference
signal by means of the free-run clock.
|