US 7,566,659 B2
Method of forming fine pattern of semiconductor device using SiGe layer as sacrificial layer, and method of forming self-aligned contacts using the same
Keun-Hee Bai, Suwon-si (Korea, Republic of); Kyeong-Koo Chi, Seoul (Korea, Republic of); Chang-Jin Kang, Suwon-si (Korea, Republic of); and Cheol-Kyu Lee, Yongin-si (Korea, Republic of)
Assigned to Samsung Electronics Co., Ltd., Suwon-Si (Korea, Republic of)
Filed on Jun. 21, 2005, as Appl. No. 11/157,435.
Claims priority of application No. 10-2004-0046555 (KR), filed on Jun. 22, 2004.
Prior Publication US 2005/0282363 A1, Dec. 22, 2005
Int. Cl. H01L 21/44 (2006.01)
U.S. Cl. 438—670  [438/704; 438/752; 438/753; 257/E21.587] 11 Claims
OG exemplary drawing
 
1. A method of forming a fine pattern of a semiconductor device comprising:
forming silicon germanium (Si1-xGex) as a sacrificial layer on a substrate;
forming a photoresist pattern having a predetermined pattern on the sacrificial layer;
dry-etching the sacrificial layer using the photoresist pattern as an etch mask, thereby forming a sacrificial layer pattern for exposing the substrate;
forming a first material layer pattern for completely filling up a region defined by the sacrificial layer pattern, wherein the first material layer pattern comprises a first material having a greater etch selectivity relative to the silicon germanium, wherein said first material layer pattern is in direct contact with said sacrificial layer pattern;
removing the sacrificial layer pattern by wet-etching; and
entirely filling the region where the removed sacrificial layer pattern is located with a second material, thereby forming a second material layer pattern which is in direct contact with the first material layer pattern, wherein, x is from about 0.1 to about 0.8.