preparing a semiconductor substrate having a cell region and a peripheral circuit region;

forming a trench isolation layer in the semiconductor substrate to define a cell active region in the cell region and a peripheral active region in the peripheral circuit region;

forming a mask layer on the trench isolation layer and the active regions;

forming a non-planar field-effect transistor selected from the group of a FinFET and a recess channel FET in the cell region;

forming a cell protection layer on the non-planar field-effect transistor and the mask layer; and

forming a planar field-effect transistor in the peripheral circuit region by:

selectively removing the cell protection layer and the mask layer to form a peripheral gate opening on the peripheral active region;

forming a peripheral gate conductive layer to fill the peripheral gate opening and cover the cell protection layer; and

planarizing the peripheral gate conductive layer and the cell protection layer to expose the mask layer so as to define a peripheral gate electrode in the peripheral gate opening.