| US 7,402,485 B1 | ||
| Method of forming a semiconductor device | ||
| William G. En, Milpitas, Calif. (US); Thorsten Kammler, Ottendorf-Okrilla (Germany); Eric N. Paton, Morgan Hill, Calif. (US); and Scott D. Luning, Poughkeepsie, N.Y. (US) | ||
| Assigned to Advanced Micro Devices, Inc., Sunnyvale, Calif. (US) | ||
| Filed on Sep. 19, 2005, as Appl. No. 11/229,864. | ||
| Application 11/229864 is a continuation in part of application No. 10/969774, filed on Oct. 20, 2004, abandoned. | ||
| Int. Cl. H01L 21/8238 (2006.01) | ||
| U.S. Cl. 438—231 [438/226; 438/232; 438/233; 438/305; 438/306] | 16 Claims |
| 1. A method of manufacturing a semiconductor device, the method comprising:
forming a sidewall spacer structure adjacent to a sidewall of a conductive gate structure overlying a semiconductor substrate
at a transistor location;
forming an epitaxial layer at a source/drain location defined by an outer surface of the sidewall spacer structure;
annealing the sidewall spacer structure before forming the epitaxial layer; and
implanting a dopant after forming the epitaxial layer to facilitate formation of a source/drain region associated with the
transistor location.
|