CPC H10N 70/24 (2023.02) [H10B 63/30 (2023.02); H10N 70/063 (2023.02); H10N 70/826 (2023.02); H10N 70/841 (2023.02)] | 13 Claims |
1. A memory device, comprising:
a device substrate;
a bottom electrode, disposed on the device substrate;
a resistance variable layer, disposed on the bottom electrode; and
a top electrode, disposed on the resistance variable layer,
wherein the bottom electrode is formed with a tensile stress, and the top electrode is formed with a compressive stress.
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